Parallelised max-Log-Map model
Article
Loo, J., Salman, K., Alukaidey, T. and Jimaa, S. 2002. Parallelised max-Log-Map model. Electronics Letters. 38 (17), pp. 971-972. https://doi.org/10.1049/el:20020663
| Type | Article |
|---|---|
| Title | Parallelised max-Log-Map model |
| Authors | Loo, J., Salman, K., Alukaidey, T. and Jimaa, S. |
| Abstract | A parallelised max-Log-MAP model (P-max-Log-MAP) that exploits the sub-word parallelism and very long instruction word architecture of a microprocessor or a digital signal processor (DSP) is presented. The proposed model reduces considerably the computational complexity of the max-Log-MAP algorithm; and therefore facilitates easy implementation. |
| Research Group | SensoLab group |
| Publisher | The Institution of Engineering and Technology (IET) |
| Journal | Electronics Letters |
| ISSN | 0013-5194 |
| Publication dates | |
| 15 Aug 2002 | |
| Publication process dates | |
| Deposited | 03 May 2011 |
| Output status | Published |
| Digital Object Identifier (DOI) | https://doi.org/10.1049/el:20020663 |
| Language | English |
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