New lace and arsenic: adventures in weak memory with a program logic (v2)

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Bornat, R., Alglave, J. and Parkinson, M. 2016. New lace and arsenic: adventures in weak memory with a program logic (v2). arXiv.org arXiv. https://doi.org/10.48550/arXiv.1512.01416
TitleNew lace and arsenic: adventures in weak memory with a program logic (v2)
AuthorsBornat, R., Alglave, J. and Parkinson, M.
Abstract

We describe a program logic for weak memory (also known as relaxed memory). The logic is based on Hoare logic within a thread, and rely/guarantee between threads. It is presented via examples, giving proofs of many weak-memory litmus tests. It extends to coherence but not yet to synchronised assignment (compare-and-swap, load-logical/store-conditional). It deals with conditionals and loops but not yet arrays or heap.
The logic uses a version of Hoare logic within threads, and a version of rely/guarantee between threads, with five stability rules to handle various kinds of parallelism (external, internal, propagation-free and two kinds of in-flight parallelism). There are B and U modalities to handle propagation, and temporal modalities since, Sofar and Ouat to deal with global coherence (SC per location).
The logic is presented by example. Proofs and unproofs of about thirty weak-memory examples, including many litmus tests in various guises, are dealt with in detail. There is a proof of a version of the token ring.

Research GroupFoundations of Computing group
Journal or PublicationArxiv
Publisher or commissioning bodyarXiv
Place of publicationarXiv.org
Publication dates
Online04 Nov 2016
Publication process dates
Deposited19 Dec 2019
Accepted04 Nov 2016
Output statusPublished
Copyright Statement

copyright = arXiv.org perpetual, non-exclusive license http://arxiv.org/licenses/nonexclusive-distrib/1.0/

Additional information

Cite as: arXiv:1512.01416v2 [cs.LO]

Web address (URL)https://arxiv.org/abs/1512.01416v2
Digital Object Identifier (DOI)https://doi.org/10.48550/arXiv.1512.01416
LanguageEnglish
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